# SPDX-License-Identifier: GPL-2.0-only

menu "Hisilicon SoC drivers"
	depends on ARCH_HISI || COMPILE_TEST

config KUNPENG_HCCS
	tristate "HCCS driver on Kunpeng SoC"
	depends on ACPI
	depends on MAILBOX
	depends on ARM64 || COMPILE_TEST
	help
	  The Huawei Cache Coherence System (HCCS) is a multi-chip
	  interconnection bus protocol.
	  The performance of application may be affected if some HCCS
	  ports are not in full lane status, have a large number of CRC
	  errors and so on.

	  Say M here if you want to include support for querying the
	  health status and port information of HCCS on Kunpeng SoC.

config HISI_HBMDEV
	tristate "add extra support for hbm memory device"
	depends on ACPI_HOTPLUG_MEMORY
	select ACPI_CONTAINER
	help
	  This driver add extra supports for memory devices. The driver
	  provides methods for userpace to control the power of memory
	  devices in a container.

	  To compile this driver as a module, choose M here:
	  the module will be called hisi_hbmdev.

config HISI_HBMCACHE
	tristate "HBM cache memory device"
	depends on ACPI
	help
	  This driver provids methods to control the power of hbm cache device
	  in hisi soc. Use hbm as a cache can take advantage of hbm's high
	  bandwidth in normal memory access.

	  To compile the driver as a module, choose M here:
	  the module will be called hisi_hbmcache.

config HISI_L3T
	tristate "Add support for l3t"
	depends on ARM64 && ACPI
	help
	  Last Level Cache driver for platforms such Kunpeng 920. This provides
	  interfaces to enable LLC cache lockdown.

	  If not sure say no.

config HISI_L0
	tristate "Add support L0 cache"
	depends on ARM64 && HISI_L3T
	help
	  L0 driver for platforms such Kunpeng 920. This provides interfaces to
	  for user to alloc and lock memory

	  If not sure say no.
endmenu
